PCB Trace Width Calculator
IPC-2221 trace width, in both directions - and the three numbers most calculators leave out: resistance at the trace's real temperature, voltage drop over your actual run length, and whether the width you just computed is even manufacturable. Every input lives in the URL, so copy the link and the calculation travels with it.
- Resistance
- 138.59 mΩ
- over 80 mm
- Voltage drop
- 138.6 mV
- at 1.00 A
- Self-heating
- 138.6 mW
- dissipated in the trace
- Trace temperature
- 35 °C
- 10 °C above ambient
138.6 mV of drop over 80 mm. On a 3.3 V rail that is 4.2% of the budget before any regulator tolerance, cable or connector is counted. Widen the trace, shorten the run, or move it to a plane.
Allowing a 20 C rise instead of 10 C would narrow this to 7.76 mil. Whether that is acceptable depends on what sits next to the trace, not on the copper: 20 C above a 25 C ambient is fine in free air and not fine inside a sealed enclosure in a sunlit window.
The link reproduces these exact inputs - paste it in a design review or a pull request.
Quick reference: 1 oz (35 um), external layer
Minimum width in mils for each current and temperature rise, from the same equation. Change the copper weight or layer above and the table follows.
| Current | 10 °C rise | 20 °C rise | 40 °C rise |
|---|---|---|---|
| 0.25 A | 1.75 mil | 1.15 mil | 0.75 mil |
| 0.5 A | 4.55 mil | 2.98 mil | 1.96 mil |
| 1 A | 11.8 mil | 7.76 mil | 5.10 mil |
| 2 A | 30.8 mil | 20.2 mil | 13.3 mil |
| 3 A | 53.8 mil | 35.3 mil | 23.2 mil |
| 5 A | 109 mil | 71.5 mil | 46.9 mil |
| 10 A | 283 mil | 186 mil | 122 mil |
The equation
IPC-2221A gives current capacity as a function of cross-sectional area and allowed temperature rise: current equals a constant times the rise to the power 0.44, times the area in square mils to the power 0.725. The constant is 0.048 for a conductor on an outer layer and 0.024 for one buried inside the board. Rearranged for area and divided by copper thickness, that is the width this page shows. Thickness comes from copper weight: one ounce per square foot is 1.378 mil, or 35 micrometres.
Why internal and external are the wrong way round
IPC-2221's two-to-one penalty for internal layers comes from chart data that predates the standard by decades. When IPC ran the measurements properly for IPC-2152 in 2009, the result was the opposite of the assumption: a trace buried in FR-4 usually runs cooler than the same trace in still air on the surface, because the dielectric conducts heat away while air mostly insulates. IPC-2152 also showed that what dominates is the thermal environment, board thickness, copper planes nearby, airflow, far more than which layer the trace sits on.
This calculator still computes IPC-2221, for one practical reason: it is what fab design rules, internal standards and most reviewers quote, so it is the number you have to defend. Treat an internal-layer result as conservative, and for anything above a few amps, or anything inside a sealed enclosure, do a real thermal check rather than trusting either standard's curve.
Width is usually not what fails
In review, the trace that causes a problem is rarely the one that got too hot. It is the one that was wide enough thermally and still dropped too much voltage: a long 3.3 V run to a sensor at the far end of the board, a ground return shared with a motor driver, a 5 A rail through a 10 mil neck at a connector pad. That is why this page shows resistance, drop and dissipated power at your real length and your real temperature. If the drop line above is more than a few percent of your rail, the width is not your problem, the topology is.
Three things this calculator deliberately does not model, and you still have to check by hand: via current capacity (a single 0.3 mm via is not a 5 A conductor, stitch them), the connector and its contact resistance, and inrush. A 1 A steady-state rail that charges a bulk capacitor through the same trace can see tens of amps for a few milliseconds, which is a fusing question, not a heating one.
If the board is the product
Trace width is a five-minute decision. Stackup, return paths, power integrity and the transfer to a fab that can actually build it are not, and they are where boards get expensive. That part is our day job: PCB design and layout explains how we work and what a board costs in engineering hours, and the battery life calculator is the other half of the power question. If a number here decides something real, a free 30-minute technical call is the fastest way to check it against someone who has shipped the board.