Microstrip and Stripline Impedance Calculator
Compute the characteristic impedance of a single-ended microstrip or stripline from its width, dielectric height, copper weight and Er, or the width that hits a target such as 50 Ω. It uses the IPC-2141 equations, shows a second model beside them for microstrip, and gives the effective Er and propagation delay. These are closed-form approximations, good to roughly 5 to 10%: use them to plan a stackup, and take the final width from a field solver or your fab. Every input lives in the URL, so a copied link reproduces the calculation.
- Hammerstad-Jensen width
- 2.78 mm · 109.4 mil
- +1.8% vs IPC-2141
- Effective Er
- 3.36
- Hammerstad-Jensen, part air
- Propagation delay
- 6.11 ps/mm
- 155 ps/in
- Trace thickness
- 35.0 µm
- 1.38 mil
Solder mask over a microstrip lowers its impedance, typically by a few ohms, and neither formula includes it. Order the board impedance-controlled and give the fab the target: it will tune the width, usually by up to 10%, to hit it on its own stackup.
The link reproduces these exact inputs - paste it in a design review or a pull request.
Bring the interfaces and the fab you plan to use. We will work out the stackup with you (layer order, reference planes, single-ended and differential widths) before the board goes to fab. If you need the whole board done, see PCB design and layout services.
Quick reference: 50 Ω microstrip width, Er 4.5, 1 oz (35 µm)
Width for 50 Ω at common dielectric heights, from the same equations. Change the structure, copper or Er above and the table follows.
| Dielectric height | IPC-2141 | Hammerstad-Jensen |
|---|---|---|
| 0.1 mm (3.9 mil) | 0.141 mm · 5.6 mil | 0.163 mm · 6.4 mil |
| 0.2 mm (7.9 mil) | 0.326 mm · 12.8 mil | 0.346 mm · 13.6 mil |
| 0.36 mm (14.2 mil) | 0.622 mm · 24.5 mil | 0.643 mm · 25.3 mil |
| 0.5 mm (19.7 mil) | 0.881 mm · 34.7 mil | 0.904 mm · 35.6 mil |
| 0.8 mm (31.5 mil) | 1.44 mm · 56.5 mil | 1.47 mm · 57.7 mil |
| 1 mm (39.4 mil) | 1.80 mm · 71.1 mil | 1.84 mm · 72.4 mil |
| 1.5 mm (59.1 mil) | 2.73 mm · 107.4 mil | 2.78 mm · 109.4 mil |
The equations, and how far to trust them
IPC-2141 gives the impedance of a surface microstrip as 87 / √(Er + 1.41) × ln(5.98 H / (0.8 W + T)), and of a symmetric stripline as 60 / √Er × ln(1.9 B / (0.8 W + T)), where W is the trace width, T its thickness, H the dielectric height to the plane and B the distance between the two planes of a stripline. Both rearrange exactly for W, which is how this page solves for a target. They are curve fits, accurate to roughly 5 to 10% inside the range they were fitted for (W / H from 0.1 to 2.0 for microstrip; W / (B - T) below 0.35 for stripline) and less reliable outside it. The calculator flags a geometry outside that range.
For microstrip it also runs Hammerstad and Jensen's 1980 equations with their thickness correction, which their authors give as accurate to better than 1% for a thin bare trace over a wide range of widths. When the two models agree, the closed form is probably close; when they differ by more than about 5%, the geometry is where IPC-2141 is weak, and that difference is a better guide to the real uncertainty than any single number. There is no second model for stripline, because the exact closed form assumes zero copper thickness and would disagree for a reason that is not an error.
What the formulas leave out
Solder mask over a microstrip lowers its impedance, typically by a few ohms. Er for FR-4 is not one number: it depends on the glass weave and resin content of each prepreg and core, and it falls with frequency, so the fab's stackup value for your build is the one to use. Plated outer copper ends up thicker than the base foil. Etching leaves a trapezoid, not a rectangle. A field solver handles all of that; for a controlled-impedance order the fab runs one against its own process and adjusts the width to hit your target.
Differential pairs are out of scope
USB at 90 Ω, Ethernet at 100 Ω, HDMI, PCIe and MIPI pairs are specified as differential impedance, which depends on the gap between the two traces as much as on their width. The closed-form coupling corrections are much less reliable than the single-ended formulas, so this calculator does not offer one. Use a 2D field solver or the fab's impedance tool for pairs.
Frequently asked questions
How wide is a 50 Ω trace on a 1.6 mm FR-4 board?
About 2.9 mm. Taking the full 1.6 mm as the dielectric, with Er 4.5 and 1 oz copper, IPC-2141 gives 2.91 mm (115 mil) and Hammerstad-Jensen 2.97 mm. A finished 1.6 mm two-layer board has closer to 1.5 mm of dielectric between its copper layers, which brings it to 2.73 mm by IPC-2141. A trace that wide is hard to route into a chip, which is why boards with RF or fast signals put a ground plane on layer 2 of a four-layer stackup.
How wide is a 50 Ω trace on a 4-layer board?
With a ground plane under a 0.2 mm prepreg, Er 4.4 and 1 oz copper, IPC-2141 gives 0.33 mm (13.0 mil) and Hammerstad-Jensen 0.353 mm (13.9 mil). The width scales roughly with the dielectric height, so a thinner prepreg needs a narrower trace. Use your fab's stackup for the real height and Er, and order the board impedance-controlled: the fab adjusts the width to hit the target on its own process.
How accurate are the IPC-2141 impedance formulas?
Roughly 5 to 10% against a field solver inside their fitted range, and worse outside it. The microstrip formula is fitted for W/H between 0.1 and 2.0, the stripline formula for narrow traces. That is why this calculator shows a second model for microstrip: a 0.15 mm trace over 0.1 mm of Er 4.4 reads 48.7 Ω by IPC-2141 and 52.7 Ω by Hammerstad-Jensen, an 8% gap. Use these numbers to plan the stackup; take the final width from a field solver or the fab.
What width gives a 50 Ω stripline?
For a trace centred between two planes 0.2 mm away on each side, with 0.5 oz copper and Er 4.3, IPC-2141 gives 0.154 mm. At that width W / (B - T) is 0.39, just outside the 0.35 the stripline formula is fitted for, so the calculator flags it and the result is a planning figure. A stripline needs a narrower trace than a microstrip at the same height, because the field is entirely inside the dielectric.
Does this calculator handle differential pairs such as 90 Ω USB or 100 Ω Ethernet?
No. Differential impedance depends on the spacing between the two traces as much as on their width, and the closed-form coupling corrections are less reliable than the single-ended formulas. For USB, Ethernet, HDMI, PCIe or MIPI pairs, use a 2D field solver or your fab's impedance calculator. This page covers single-ended microstrip and symmetric stripline only.
If the board is the product
One trace width is a five-minute decision. A stackup that routes a radio, a USB port and a DDR bus on a board a fab can build at your price is not, and that is our day job: PCB design and layout explains how we work and what a board costs in engineering hours. For the current-carrying side of the same traces, the PCB trace width calculator runs IPC-2221, and the PCB cost calculator prices the layer count. If a number here decides something real, a free 30-minute technical call is the fastest way to check it against someone who has shipped the board.