Electronic Product Development Services: What You Are Actually Buying

"Electronic product development services" means whatever the firm quoting you wants it to mean. Two proposals for the same device can differ by several times over, and the expensive one is sometimes the honest one — it priced the compliance work, the test fixture, and the manufacturing handoff the cheap one left off the page. You are not buying engineering time; you are buying a sequence of phases, each producing an artifact you can inspect, and a file package at the end that lets you build the product with or without the firm that designed it.

The Phases, and the Artifact Each One Produces

A real proposal names phases and says what each one hands you. If a phase in your quote has no artifact attached, it is not a phase — it is a billing period.

• Requirements and architecture — a written spec: power budget by operating state, interfaces, environmental limits, certification targets, unit cost at volume, plus a block diagram and the MCU, radio, and power-tree rationale.
• Schematic design — an annotated schematic PDF and the native ECAD project, every part carrying a real manufacturer part number and live availability.
• PCB layout — stackup and impedance targets, a DRC-clean board against your fabricator's rules, a 3D model for the mechanical designer, fabrication and assembly drawings.
• Firmware — a repository you can clone, a pinned toolchain, and a build that goes from clean checkout to flashable binary in one documented command, tagged per hardware revision.
• Industrial design and enclosure — a CAD package a tooling vendor can quote against, a tolerance stack for connectors and buttons, material, finish, and IP-rating decisions.
• Prototype build — a stated number of assembled units, 5 or 10 or 25, and a build report: what was populated, substituted, or rejected.
• Bring-up and validation — a test report against the requirements: current in each power state, RF range, thermals at full load, defects carried forward.
• Compliance — a pre-scan result, a test plan, lab bookings, and the paperwork: the EU technical file, including the risk assessment and the signed Declaration of Conformity, plus the FCC exhibit set.
• Manufacturing handoff — Gerbers, drill, pick-and-place, BOM with approved alternates, functional test procedure and fixture, assembly work instructions, first-article criteria.

What "Done" Means Per Phase, and Why It Beats an Hours Bucket

The weakest proposals are a number of hours against a rate. When schematic capture runs 60 hours over, nobody can tell whether that was your scope change or their inexperience, and you argue for a week instead of designing. Fixed deliverables move estimation risk to the party with the expertise to carry it. Acceptance criteria should be boring and checkable:

• "Schematic review complete" means a review meeting happened with your named engineer present, an issue list came out of it, and every issue is closed or deferred in writing.
• "Layout complete" means DRC-clean against the actual fabricator's rules, impedance-controlled nets marked on the drawing, and a DFM report from the assembler returned and addressed — not pending.
• "Firmware complete for Rev A" means the device performs the listed functions on the listed hardware revision, built from a tagged commit, with the bring-up log attached.
• "Prototypes delivered" means N units powered up and passing an agreed checklist. A box of unpopulated boards is not a delivery.

Tie payment to the four or five gates that actually carry it, with no milestone much over a quarter of the contract and the last released at manufacturing handoff, not at "design complete." And no firm can honestly fix-price that handoff before the schematic exists: expect firm prices for requirements, schematic, and layout, a planning estimate downstream, and a re-quote once the radio and enclosure are settled.

Requirements and Architecture: Cheap to Write, Expensive to Redo

This phase runs roughly $4,000–$12,000 over one to three weeks, and it is the one founders most often ask to skip. Three questions have to be answered before anyone opens a schematic editor: how long the battery must last at the real duty cycle, which certification marks the product needs in which markets, and the unit cost target at what volume. Each answer changes the parts list — a 225 mAh CR2032 and a 2,000 mAh li-ion are not the same power tree, and learning that during layout costs a re-spin. Most documents labeled "spec" are feature lists with none of that in them. The cost side of the same decision is in how much hardware prototyping really costs.

Schematic to Layout: Gates That Belong in the Contract

Between schematic and layout there should be a named review with an issue list; between layout and fabrication, a DFM review from the actual assembler rather than a generic checklist. Skipping either is where the second spin comes from. This stretch also controls the hardware-firmware interface, and firmware written against a board that then changes is a reliable way to lose a month. The fix is unglamorous: a version-controlled hardware definition — pin map, power states, bus addresses, reset behavior — so moving a pin is a document revision, not a verbal note nobody wrote down.

Bring-Up, Validation, and the Test Fixture Nobody Budgets

Bring-up deserves its own line item — one to three weeks even when nothing is wrong, and the first honest measurement of whether the architecture held: sleep current against the budget, RF range against the spec, thermal rise at full load.

The test fixture is the item most often missing from a quote. A pogo-pin jig and the script that exercises the board starts around $3,000–$8,000 for simple functional test; a bed-of-nails or boundary-scan fixture for a product scaling past a thousand units runs $8,000–$25,000. Without one, functional test at the CM is a person with a multimeter and a checklist, and you have no yield data until returns start.

Compliance and Manufacturing Handoff: Discovered Late, Paid For Twice

Compliance is a constraint on layout, not a step at the end. A day of pre-compliance chamber time runs $1,500–$4,000. The accredited lab is three numbers rather than one: an FCC Part 15B radiated-plus-conducted scan runs roughly $5,000–$15,000, a CE package (EN 55032 emissions plus EN 55035 immunity) runs $8,000–$25,000, and an intentional radiator under Part 15C adds more on top — so a wireless product selling into both markets should budget around $13,000–$40,000. The retest after a fail is only $1,500–$5,000 on its own, but the loaded cost — layout rework, a fab and assembly run, four to seven weeks of lost schedule — commonly reaches $15,000–$40,000. The design side of avoiding it is in EMC by design.

A pre-certified module earns its per-unit premium: you inherit its modular grant for the radio under Part 15C, the expensive test. It does not remove the lab visit. Your finished product is still an unintentional radiator and must pass Part 15B on its own, and you have to respect the module's antenna, trace, and keep-out rules or the grant stops covering you. Going module-free saves BOM cost and commits you to a full intentional-radiator certification.

Manufacturing handoff is the phase most consultancies quietly end before. A working prototype and a manufacturable product are different milestones, separated by the build stages in EVT, DVT, and PVT. Ask where the engagement stops, and ask on the first call.

The Handoff Package You Must Own, and the IP Questions to Ask First

The test of a handoff package is simple: could a second firm take it and produce the same board without talking to the first? If not, you do not own your product. It should contain native ECAD source rather than only outputs; firmware source in a repository you control, with pinned toolchains; mechanical CAD in native and neutral formats; the fabrication, assembly, and test files from the handoff phase; and the compliance documentation. Ask for it at every phase gate, not at the end when your leverage is gone. Four questions about the contract language are worth asking before you sign:

1. Are deliverables assigned to us on payment of each phase, including source code and native ECAD files? Watch for "license" where you expected "assign."
2. What background IP does the firm retain, and is it listed by name? Reusing internal libraries is normal; your license should be perpetual, royalty-free, and transferable if you are acquired.
3. Which third-party licenses are in the firmware, and are any of them copyleft?
4. If the engagement ends mid-phase, do we receive the work in progress?

How Projects Fail, and the Signals That Predict It

The failure modes repeat, and each one is a missing artifact: compliance discovered after layout froze, no DFM review before the first CM quote, firmware built against a pin map that changed, no fixture until yield collapses at unit 500, a sole-sourced part with a 26-week lead time nobody flagged. The early warnings show up on the sales call.

• A phase with no deliverable attached — "system integration, four weeks" with nothing you can open at the end of it.
• One lump price for "we handle everything," with no gate list and no acceptance criteria.
• No DFM step named in the plan, and no contract manufacturer relationship mentioned.
• No compliance evidence. Ask for the FCC ID of a product they certified; a firm that has never sat in a chamber will be surprised by the same things you are.

The broader vetting script — staffing, how spins are priced, references you can call unbriefed, what happens to source files if the relationship ends — is in how to vet a hardware engineering firm.

Limits belong on our side too. inteRFace R&D does custom electronics, firmware, industrial and mechanical design, prototyping, and manufacturing handoff, and we are on site for first-article inspection and pilot builds. We do not run our own EMC chamber, do not do silicon design, do not operate an assembly line, and do not staff a resident process engineer at your CM. We prepare the compliance file and work with the labs and factories that do.

Frequently Asked Questions

What does a full engagement cost, end to end?

A straightforward connected device — one MCU, one radio, battery powered, an existing enclosure — usually runs $60,000–$150,000 from requirements to a design validated for pilot build, over five to nine months. RF-heavy, mixed-signal, or regulated products commonly land between $150,000 and $400,000. The biggest cost driver is not complexity; it is how many times the requirements change after layout starts.

How long until we have a working prototype?

For a battery, BLE, and sensor board with a simple enclosure: twelve to sixteen weeks from kickoff to a working Rev A on the bench, if requirements freeze by week two and parts are in stock. Hardened injection-mold tooling is a separate track on top of that — $20,000–$80,000 and six to ten weeks to first samples, per our enclosure design guide. Anyone quoting six weeks is quoting a board, not a product.

Where to Start

Send a one-page description to https://interfacernd.com/#contact: what the device does, where it will be sold, battery or wall power, target unit cost and first-year volume. We come back with a phase list, the artifact each phase produces, a written quote for requirements and architecture, and a planning estimate for the rest — with a written quote for schematic and layout once that requirements document exists, because that is when the number stops being a guess. Still choosing between a firm and your first in-house hires? That comparison is in hardware firm vs in-house. And if we are the wrong fit, we will say so on the call.